– ABOUT US

It’s been an interesting 18 year development for us, engaging with over 200 companies in 35 countries. 

Our team of engineers work from multiple design centres throughout Europe. The working environment is based on a collaborative approach, solving problems, sharing experiences and fostering a learning environment. ISO9001-2015 certification covers all of our customer processes and quality systems.

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– OUR SERVICES

When it comes to all technology nodes from 5nm and below there are few companies can claim the
depth of knowledge we can access in-house.

We help companies who have a lack of IC layout skills or resources in
house to complete projects to a high standard, on time and on budget.

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– TRAINING

Investment in training has become more important than ever, with the Layout of an IC having more influence over functionality.

Our IC Layout courses empower engineers with the knowledge to improve their decision making especially when seeking to create optimal layouts.

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– CLIENT TESTIMONIALS
  • “Once again IC Mask Design have delivered efficiently and on time. The communication between our designers and IC Mask Design was very clear and our designers trusted the layout engineer, which is a key recipe for success. They felt they were listened to carefully and the layout engineer understood the designer’s requests. The layout engineer was also fast in executing all the given tasks and the post layout verification shows very good match between schematic and layout extracted view. We were particularly impressed with the response to some last-minute change requests and to the flexibility shown. Overall, it was effective and efficient collaboration”

    BRENDAN FOLEY, SILICON DESIGN TEAM MANAGER, MACOM
  • “Moortec has a long standing relationship of partnering with IC Mask Design for layout consultancy. They have always provided technically strong resource which has integrated with our own design team seamlessly. Their engineers communicate well, provide high quality results, and in an extremely efficient manner. We have worked with IC Mask Design on a number of projects on 65nm, 40nm and 28nm and have always been impressed by their knowledge of the underlying technology, and ability to pick up the process and produce results.”

    OLIVER KING, CTO, MOORTEC
  • “Inphi has used IC Mask Design to supplement its in-house layout activity since 2010. During that time, IC Mask has worked on key analog building blocks for Inphi’s 28Gb/s CMOS PHY IP. IC Mask Design has always delivered high quality layout and has worked efficiently with Inphi’s engineers both in the UK and California to meet aggressive timescales. This has resulted in Inphi giving repeat business to IC Mask Design and extending contracts on several occasions. The IC Mask engineers have a thorough understanding of the requirements of layout for high-speed design and have successfully laid out a range of transmitter, receiver and clocking circuits that have needed minimal post-layout rework and no post-silicon redesign. IC Mask can successfully apply their knowledge whilst working remotely in a customer environment.”

    MIKE HARWOOD, DIRECTOR, INPHI UK DESIGN TEAM, TECHNICAL & PROJECT LEAD FOR INPHI’S 28GB/S PHY DEVELOPMENT
  • “IC Mask Design has been helping us in two aspect of layout design. By providing us highly experienced layout engineers when much needed and the high value training that they’re conducting. IC Mask Design Training has been essential for our Layout team especially the Advanced Analog Layout Techniques. It has given my team a thorough knowledge on the underlying issues we’re facing when designing on leading edge technologies. The Basic / Advanced Analog Layout Techniques are highly recommended for those circuit/layout engineers just starting to do layout and those experienced engineers wanting to refresh and get updated on the issues surrounding layout design.”

    ROSENDO LUGARES, IC LAYOUT MANAGER, XILINX
  • “I was very impressed with the service provided by IC Mask Design. There were difficulties with CAD tools and design kits and all these were identified by IC Mask Design and included in project planning and clearly reported to me, with suggestions made to mitigate against them. I was very impressed with the work done on the 65nm Analog Layout. For an ADC design with a large custom digital/switching network and large number of unit capacitors, the design was very well floor planned and minimised critical nets. IC Mask Design highlighted and communicated all problems extremely well, kept me updated on progress, were very knowledgeable on all aspects of the layout and tools (both analogue and digital) and really took the initiative to solve any problems that arose during the course of the project.”

    DR. TONY SCANLAN, SENIOR RESEARCH
    FELLOW AT UNIVERSITY OF LIMERICK
  • “We were undertaking a very complex design on a 65nm technology node. We needed to engage a physical design partner that understood how to overcome the design challenges through a deep knowledge of the toolsets involved. IC Mask Design met all the criteria to give us the confidence that the design could be delivered on target and within the aggressive constraints that we outlined.”

    BRENDAN BARRY, DIRECTOR OF IC DEVELOPMENT, MOVIDIUS
  • “At S3 Group we were on a tight schedule to complete the development of our high performance Mixed Signal IP on 28nm technology. To support us achieving the completion dates, we engaged IC Mask Design. The outcome of this was that we met the tight deadlines and were indeed satisfied with the contributions we received. Looking ahead to the future, we will certainly factor in availing of IC Mask Design’s layout expertise when required.”

    MIKE MURRAY, BUSINESS LINE MANAGER, S3 GROUP
  • “We are moving to design on Very Deep Submicron Technology nodes and were looking for a better understanding of the challenges we face. We engaged IC Mask Design to provide a customised 3-day Very Deep Submicron Layout Course which included lectures and associated labs. This course was attended by both frontend designers and layout engineers and we gained a better appreciation of these challenges. The course provided us with a better understanding of the impact layout has on yield with areas of parasitics, matching, isolation strategies and DFM covered in great detail. The instructor displayed an in-depth technical knowledge and was able to address any queries that arose. We would highly recommend IC Mask Design’s Layout Training Courses and will be engaging them for any future training needs.”

    DR.-ING LUTZ POROMBKA, CEO/GESCHAFTSFUHRER, CREATIVE CHIPS GMBH
  • “As part of our product roadmap we integrated our market leading low light sensors with a standard CMOS process. This involved close interaction between IC Mask Design, our engineering team, customer and foundry. IC Mask Design did an excellent job producing an optimal layout solution, along with supporting the generation of a parasitic flow to include testbench generation and spice simulation. A verification flow was also developed to test and debug the physical verification decks. This all culminated in the generation of multiple testchip variants and overall we were extremely happy with the support provided by IC Mask Design and would recommend them as a Layout Design Services Partner to other potentialcustomers.”

    CARL JACKSON, CTO & VP OF ENGINEERING, SENSL TECHNOLOGIES LTD.
  • “Toumaz often use layout contract resource to supplement our internal team at busy times such as approaching large SoC tape outs. On our recent RF full-custom 40nm tape out, we found IC Mask to be a competent and dependable contract layout resource. Layouts were delivered on time and to a good standard, and IC Mask were flexible in accommodating our requests for additional engineering work at relatively short notice.”

    ALISON BURDETT, CTO, TOUMAZ
  • “Fast and accurate iterations on layout were important to reduce design time and meet our specifications on extracted layout. IC Mask Design helped us achieve that. They were very flexible and always did their best to provide us with the layout resources we needed. Also, the close interaction between our internal designers and the IC Mask Layouters was very important to meet our performance specs. I would gladly recommend IC Mask Design for layout services.”

    ERIK FOSSUM FAREVAAG, ANALOG DESIGN MANAGER, ENERGY MICRO
  • “IC Mask Design carried out the full layout of our first LED driver product. As a small start-up company we needed a layout partner whom we could trust to take full responsibility to carry out the entire chip layout from individual analog and digital block layout through to a tapeout-ready GDSII database. Their team have the necessary experience to provide such a service and delivered the layout on-budget and on-time and we would have no hesitation in using the IC Mask Design team again.”

    CONOR MCAULIFFE, FOUNDER & CEO, IKON SEMICONDUCTOR
  • “Tanner EDA is a proud business partner of IC Mask Design. The basis of our relationship is a shared commitment to driving innovation and productivity in analog IC design. By combining their deep expertise in analog layout and their patented analog acceleration technology with our software; we are reducing the bottleneck in the analog and mixed-signal layout process. IC Mask Design consistently meets or exceeds project deadlines and demonstrates keen focus on the customer as well as commanding knowledge of the analog design space.”

    GREG LEBSACK, PRESIDENT, TANNER EDA
  • “We had a difficult challenge, designing precision analog circuits in 90nm technology to reside on a baseband processor, in a compressed timescale. IC Mask Design were able to help meet our timescale. They were flexible, and delivered on time within the design constraints imposed. They operated like an extension of our own design team.”

    MOTOROLA
– CONTACT US

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