– RF LAYOUT
Every circuit is impacted by the parasitics introduced in layout, whether that impact is increased current consumption, increased silicon area, voltage drop, the introduction of a delay in to a signal, or limiting the maximum operating frequency of a design. These impacts are never more pronounced than in RF designs, given their higher operating frequencies.
IC Mask Designs RF Layout course can be summarised in three words: “Reduce, reduce, reduce” where the primary focus is on giving a detailed understanding on how parasitics are formed, the different types and sub-types of parasitic devices that exist, as well as discussing practical techniques for optimising layouts to reduce the parasitics that are introduced.
PRICE OF COURSE
DURATION OF COURSE
LEVEL OF COURSE
The course expects the participants to already be very competent, confident, and comfortable with Analog layout, and ideally, they’ll have completed multiple different tapeouts on different technology nodes across numerous different applications.