– ADVANCED ANALOG LAYOUT
IC Mask Design’s Advanced Analog Layout self-paced e-learning training course is delivered through an accessible online portal.
It empowers learners to progress at their own pace, allowing flexibility in module completion and video viewing.The course is targeted at an audience of both senior layout engineers, looking to make an incremental step in improving their skill sets and knowledge area; and front-end schematic designers, looking to improve their design techniques to facilitate more efficient and higher quality layout and silicon. This course offers a comprehensive learning experience, comprising of seven main modules with nearly 100 videos, totalling over 19 hours of content. There are regular assessments throughout to check progress. At the conclusion of the course, all course notes are readily available, facilitating focused engagement.
– LEVEL OF COURSE
The course expects the participants to already be very competent, confident, and comfortable with Analog layout, and ideally, they will have completed multiple different tapeouts on different technology nodes across numerous different applications.
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– CHOOSE YOUR LEARNING STYLE
As you embark on this course, certain lessons offer you two distinct pathways to tailor your learning experience to your preference. Feel free to choose the path that best suits your learning style and pace. You can always switch between the two options at any point in your journey.
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CHAPTER BY CHAPTER
Prefer to take it one step at a time? Our chapter-by-chapter approach allows you to navigate through the content in manageable sections. This option is perfect for learners who appreciate focusing on specific topics in detail and might need breaks in between.
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UNINTERRUPTED VIDEO BLOCK
If you’re the type who likes to dive deep and immerse fully, select this option to engage with the entire lesson in a single, continuous video. This choice suits learners who enjoy a seamless learning flow and wish to grasp the big picture without interruptions.
A look at the base layers used in bulk CMOS processes & a deep dive into the semiconductor manufacturing process and the symbiotic relationship to IC layout.
The functionality, formation and layout of active and passive devices. The principles of P/N junctions and other device physics that impact both the layout quality and electrical characteristics of those devices.
A discussion of both interconnect and device parasitics, looking at optimisation techniques, compromises and constraints; resistance over capacitance, capacitance over area, area over resistance, etc. and how to make informed compromises in layout.
Deep dive into device matching, discussing the techniques that should or should not be applied in layout from both a manufacturing perspective and a design perspective.
Understanding the key building blocks used in analog circuit design; how these work on a functional level, their key requirements and how to approach the layout in an efficient manner.
A look at latchup and latchup immunity; Understanding the primary risk areas and how layout both introduces and impacts the beta and trigger/holding voltages of the parasitic bipolar in the latchup SCR.
Understanding substrate noise isolation techniques in layout, where we look to increase resistive attenuation through
substrate and other techniques to apply that will provide sufficient isolation (through substrate) between adjacent devices
and circuits.
